VLSI Lab Manual

This post gives you information regarding Very Large Scale Integration (VLSI) laboratory, which was recently added to B.tech students of JNTU-K for R13 regulation students. Previously M.Tech in VLSI related branches used to have this laboratory, now it was included in B.Tech progamme too.

This laboratory can be done by using Tanner EDA tool or by using Mentor Graphics tool. Tanner EDA is older version and Mentor Graphics is advanced new version with more add ons. In Tanner EDA we used Tanner tools v.13.0.

It is a back end tool, this lab mainly focuses on how to design an IC, how much amount of area will be consumed by a specific design, its speed, power, delay can be calculated. We can draw schematics using pmos and nmos devices using S-Edit, we can draw layouts as per lambda based design rules using L-Edit, netlist can be generated from S-Edit or L-Edit to T-Spice or directly netlist can be written in T-Spice just like B2Spice or P-Spice or any Spice tools and finally waveforms are viewed in W-Edit.
Using Tanner tools software, ten designs have been done, the complete implementation procedure with schematics, layouts, netlists and output waveforms are given in the following manual created by us.
The lab manual includes the following list of designs:
List of Experiments:
1. Design and implementation of an inverter
2. Design and implementation of universal gates
3. Design and implementation of full adder
4. Design and implementation of full subtractor
5. Design and implementation of RS-latch
6. Design and implementation of D-latch
7. Design and implementation asynchronous counter
8. Design and Implementation of static RAM cell
9. Design and Implementation of differential amplifier
10. Design and Implementation of ring oscillator


To download the lab manual in .pdf format click on "CLICK ME": CLICK ME