Switching Circuits and Logic Design: Week 5: Assignment 5:

COMBINATIONAL LOGIC DESIGN

1. Suppose you are implementing the SUM output of a full adder using AND, OR and NOT gates. Assume that the delay of an AND gate is 3 time units, delay of an OR gate is 2 time units, and the delay of a NOT gate is 1 time unit. The total propagation delay for generating the SUM output will be ……….

Ans: 6

2. The number of 2-input EXOR gates required to implement the SUM output of a full adder is ……….

Ans: 2

3. Suppose you are implementing a 4-bit ripple-carry adder using NAND gates only. If the delay of one NAND gate is 2 nanoseconds, the total time required for the addition will be ……………… nanoseconds.

Ans: 18

4. How many AND, OR and NOT gates will be required to implement the carry generate and carry propagate functions of a single stage (1 bit) in a carry lookahead adder? ……………..

Ans: 6

5. Which of the following statements is true?

a. Any n-variable switching function can be implemented using a 2^[n-1] -to-1 multiplexer and one AND gate.
b. Any n-variable switching function can be implemented using a 2^[n-1] -to-1 multiplexer and one OR gate.
c. Any n-variable switching function can be implemented using a 2^[n-1] -to-1 multiplexer and one NOT gate.
d. None of these.

Ans: c

6. How many 2-to-1 multiplexers will be required to build a 8-to-1 multiplexer?
a. 4
b. 5
c. 6
d. 7

Ans: d

7. A BCD to decimal decoder has
a. 4 inputs and 10 outputs
b. 4 inputs and 16 outputs
c. 4 inputs and 4 outputs
d. None of these

Ans: a

8. Which of the following is not true for a priority encoder?
a. Exactly one input line can be active at a time.
b. More than one input lines can be active at a time.
c. It generates the code corresponding to the active input with highest priority.
d. None of these.

Ans: a

9. For a 7-segment display input, if the output of 1 indicates that a segment will glow, what will be the outputs for displaying the letter ‘F’?
a. A = 1, B = 0, C = 0, D = 0, E = 1, F = 1, G = 1
b. A = 1, B = 0, C = 0, D = 1, E = 1, F = 1, G = 1
c. A = 1, B = 1, C = 0, D = 0, E = 1, F = 0, G = 1
d. None of these

Ans: a

10. How many 2-to-4 decoders will be required to build a 4-to-16 decoder? ……………

Ans: 5